Verified Job
IT / Software / Data Analyst
SMTS-Design Verification Engineer: SOC Focused
IT / Software / Data Analyst
#714285
Remote / WFH
Job Description
SMTS-Design Verification Engineer : SOC Focused (Experience Level 11-14)
Bangalore
Founded in 2023,by Industry veterans HQ in California,US
Location: Greater Bengaluru Area
Company Description
We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI.
Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.Principal Design Verification Engineer : SOC Focused (Experience Level 11-14 years)
Job Description
We are seeking a SoC Verification Engineer to work on end-to-end data-path verification for high-performance ARM-based SoCs. This role focuses on validating correctness, coherency, performance, and scalability of data movement across PCIe and CXL fabrics, from IP blocks through interconnect to CPUs and memory, at chip and multi-chip system levels. This is full-chip, cross-IP, real-silicon mindset verification.
Key Responsibilities
• Verify multi-chip/chiplet system verification Multi-die stimulus and validation:
• UCIe / CXL links across dies
• Execute SoC-level DV plans for flows pertaining to UCIe link across chiplets.
• Scalability testing:
• N-chip configurations
• Implement:
• UVM-based system tests including mid-transaction reset, contention scenario
• Scoreboards and data integrity checks under high throughput, concurrent traffic
• Debug complex failures using:
• Waveforms
• Transaction traces
• Firmware interaction
• Collaborate with RTL, architecture, and firmware teams
Required Skills & Experience
• UCIe system knowledge
• Understanding of cache coherency (CHI / ACE preferred)
• Proficiency in:
• SystemVerilog / UVM
• Transaction-level verification
Preferred Qualifications
• Multi-chip / chiplet system experience
• Exposure to real workloads (storage, networking, AI accelerators)
Contact:
Uday
Mulya Technologies
"Mining The Knowledge Community"
Bangalore
Founded in 2023,by Industry veterans HQ in California,US
Location: Greater Bengaluru Area
Company Description
We are looking for exceptional talent and leadership to join , the world’s first company developing Agentic Silicon for powering the future of AI.
Founded in 2023, our team consists of 90+ highly skilled engineers from leading companies such as Intel, Marvell, Nvidia, Qualcomm, Cisco, AMD, Apple etc. We have deep customer engagements across America, Europe, and Asia, and demonstrated functional prototypes to prove our concept and vision.Principal Design Verification Engineer : SOC Focused (Experience Level 11-14 years)
Job Description
We are seeking a SoC Verification Engineer to work on end-to-end data-path verification for high-performance ARM-based SoCs. This role focuses on validating correctness, coherency, performance, and scalability of data movement across PCIe and CXL fabrics, from IP blocks through interconnect to CPUs and memory, at chip and multi-chip system levels. This is full-chip, cross-IP, real-silicon mindset verification.
Key Responsibilities
• Verify multi-chip/chiplet system verification Multi-die stimulus and validation:
• UCIe / CXL links across dies
• Execute SoC-level DV plans for flows pertaining to UCIe link across chiplets.
• Scalability testing:
• N-chip configurations
• Implement:
• UVM-based system tests including mid-transaction reset, contention scenario
• Scoreboards and data integrity checks under high throughput, concurrent traffic
• Debug complex failures using:
• Waveforms
• Transaction traces
• Firmware interaction
• Collaborate with RTL, architecture, and firmware teams
Required Skills & Experience
• UCIe system knowledge
• Understanding of cache coherency (CHI / ACE preferred)
• Proficiency in:
• SystemVerilog / UVM
• Transaction-level verification
Preferred Qualifications
• Multi-chip / chiplet system experience
• Exposure to real workloads (storage, networking, AI accelerators)
Contact:
Uday
Mulya Technologies
"Mining The Knowledge Community"
