Verified Job
IT / Software / Data Analyst
Analog Layout Engineer - 4+ Years - Bangalore Location
IT / Software / Data Analyst
#745207
Remote / WFH
leadIC Design Pvt Ltd · Bengaluru, Karnataka ·
Job Description
Job description
Company Description LeadIC Design Pvt Ltd is a VLSI engineering company focused on accelerating semiconductor innovation through full-stack design and verification expertise. Founded in 2018, the organization has grown into a trusted partner for global semiconductor companies, supporting the complete chip development lifecycle with strong technical ownership and flexible engagement models. With engineering teams across India and Canada, LeadIC delivers high-quality design services tailored for product-focused teams. Its capabilities span custom, memory and analog layout, analog/mixed-signal circuit design, digital design and verification, physical design, STA, DFT, physical verification, IP characterization, and FPGA-based prototyping. LeadIC emphasizes an engineering culture built on ownership, quality-driven execution, and long-term technical partnerships that help customers achieve silicon success.
Role Description This is a full-time, on-site Analog Layout Engineer role based in Bengaluru. The role involves designing and implementing analog and mixed-signal layout for complex integrated circuits, working closely with circuit design engineers to translate schematics into robust layout solutions. Day-to-day responsibilities include floorplanning, device placement, routing, matching-sensitive layout, and optimization for performance, area, and reliability across multiple process technologies. The engineer will perform layout-versus-schematic (LVS), design rule check (DRC), and other physical verification activities, ensuring compliance with foundry guidelines and project requirements. The role also includes collaborating with cross-functional teams, participating in design reviews, documenting layout methodologies, and supporting tape-out and post-silicon improvement cycles.
Qualifications
• Strong proficiency in Layout Design for analog and mixed-signal blocks, including floorplanning, device matching, and routing optimization.
• Hands-on experience in Circuit Design and understanding of Analog Circuits to effectively interpret schematics and design intent.
• Deep knowledge of Analog design principles such as noise, mismatch, IR drop, electromigration, and reliability-aware layout practices.
• Practical experience with Physical Verification, including DRC, LVS, ERC, and resolving verification issues to meet foundry sign-off requirements.
• 4+ years of relevant experience in analog layout for CMOS technologies in the semiconductor or VLSI industry.
• Proficiency with industry-standard EDA tools for layout and verification (such as Cadence Virtuoso, Synopsys, Mentor/Siemens tools or equivalent).
• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related discipline.
• Ability to work independently, manage multiple blocks, meet schedule commitments, and collaborate effectively with global engineering teams.
• Good communication skills, attention to detail, and a quality-focused approach to design and documentation.
Company Description LeadIC Design Pvt Ltd is a VLSI engineering company focused on accelerating semiconductor innovation through full-stack design and verification expertise. Founded in 2018, the organization has grown into a trusted partner for global semiconductor companies, supporting the complete chip development lifecycle with strong technical ownership and flexible engagement models. With engineering teams across India and Canada, LeadIC delivers high-quality design services tailored for product-focused teams. Its capabilities span custom, memory and analog layout, analog/mixed-signal circuit design, digital design and verification, physical design, STA, DFT, physical verification, IP characterization, and FPGA-based prototyping. LeadIC emphasizes an engineering culture built on ownership, quality-driven execution, and long-term technical partnerships that help customers achieve silicon success.
Role Description This is a full-time, on-site Analog Layout Engineer role based in Bengaluru. The role involves designing and implementing analog and mixed-signal layout for complex integrated circuits, working closely with circuit design engineers to translate schematics into robust layout solutions. Day-to-day responsibilities include floorplanning, device placement, routing, matching-sensitive layout, and optimization for performance, area, and reliability across multiple process technologies. The engineer will perform layout-versus-schematic (LVS), design rule check (DRC), and other physical verification activities, ensuring compliance with foundry guidelines and project requirements. The role also includes collaborating with cross-functional teams, participating in design reviews, documenting layout methodologies, and supporting tape-out and post-silicon improvement cycles.
Qualifications
• Strong proficiency in Layout Design for analog and mixed-signal blocks, including floorplanning, device matching, and routing optimization.
• Hands-on experience in Circuit Design and understanding of Analog Circuits to effectively interpret schematics and design intent.
• Deep knowledge of Analog design principles such as noise, mismatch, IR drop, electromigration, and reliability-aware layout practices.
• Practical experience with Physical Verification, including DRC, LVS, ERC, and resolving verification issues to meet foundry sign-off requirements.
• 4+ years of relevant experience in analog layout for CMOS technologies in the semiconductor or VLSI industry.
• Proficiency with industry-standard EDA tools for layout and verification (such as Cadence Virtuoso, Synopsys, Mentor/Siemens tools or equivalent).
• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related discipline.
• Ability to work independently, manage multiple blocks, meet schedule commitments, and collaborate effectively with global engineering teams.
• Good communication skills, attention to detail, and a quality-focused approach to design and documentation.
