Sr. Verification Engineer
Job Description
Role : Perform verification using UVM and SVM on multiple IP, Blocks and top.
Desired Skills:
• Experience working of SV and UVM methodology and knowledge of at least one industry standard protocols like Ethernet, PCIe, MIPI, USB, AXI, RISC-V, AMBA, DDR or similar is required, must have executed at-least 1 IP or SoC Verification projects.
• Experience in setting up and debugging functional and/or gate-level simulations
• Experience in translating functional requirements into verification plans
• Experience in developing verification environment and regression setup.
• Coverage analysis and closure.
• Familiarity with using 3rd party VIPs
• Good handle on Scripting (Python/Perl/shell).
Experience : 4 to 6 Years
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