Verified Job
Engineering - Architecture
Digital Design Verification, Principal Engineer / Architect - 17323
Engineering - Architecture
#743574
Remote / WFH
Synopsys · Bengaluru, Karnataka ·
Job Description
Job description
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent over a decade in verification, and you have learned that the difference between a verification flow that works and one that collapses under pressure is usually a decision made at the architecture stage. You are the engineer who catches that decision before it becomes technical debt. You think in systems, not scripts. You know that building verification infrastructure is not about assembling tools, it is about creating an environment where teams can move fast without breaking things.
You have built verification environments from scratch using VCS, Verdi, VMS Execution Manager, and UVM, and you know where each tool shines and where it does not.
What You'll Be Doing
• Architect and implement unified verification flows for Synopsys digital IP products using VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs
• Build scalable verification infrastructure from the ground up, designing environments that support complex IP and SoC projects across global teams
• Define, document, and propagate verification methodologies and best practices that become the standard across Synopsys digital IP projects
• Lead and mentor verification engineers, providing technical guidance on UVM, SystemVerilog, flow optimization, and debugging strategies
• Drive technical initiatives independently, managing high-impact assignments from concept through deployment and adoption
• Collaborate with EDA tool development teams to influence product roadmaps, provide feedback, and optimize verification workflows for real-world use cases
• Troubleshoot and refine verification processes for internal teams and customers, diagnosing flow bottlenecks and delivering solutions that stick
The Impact You Will Have
• Establish verification methodology standards that accelerate time-to-market for Synopsys digital IP and SoC products
• Enable global verification teams to deliver higher quality results faster by providing robust, reusable flows and infrastructure
• Shape the verification strategy for next-generation Synopsys IP offerings, directly influencing product quality and customer satisfaction
• Reduce verification cycle time and resource overhead across multiple projects by standardizing tooling and best practices
• Develop the next generation of verification engineers at Synopsys, building a culture of technical excellence and continuous learning
• Influence the evolution of Synopsys EDA tools by providing critical, field-tested feedback to product teams
• Strengthen Synopsys' leadership position in semiconductor verification by driving adoption of cutting-edge methodologies across the organization
What You'll Need
• 10+ years of hands-on experience in IP or SoC verification, with a proven track record of leading technical initiatives and delivering complex verification environments
• Deep expertise with Synopsys verification tools including VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and Verification IP (VIP)
• Strong programming and scripting skills in SystemVerilog, UVM, Tcl, and Python for automation and flow development
• Demonstrated ability to architect verification flows and infrastructure for complex digital designs, from initial concept to production deployment
• Bachelor's degree in Electronics, Electrical, or Computer Engineering; advanced degrees are a plus
• Experience managing multiple technical projects independently, balancing priorities and delivering high-quality results on schedule
• Ability to document and communicate technical methodologies clearly across global, cross-functional teams
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You have spent over a decade in verification, and you have learned that the difference between a verification flow that works and one that collapses under pressure is usually a decision made at the architecture stage. You are the engineer who catches that decision before it becomes technical debt. You think in systems, not scripts. You know that building verification infrastructure is not about assembling tools, it is about creating an environment where teams can move fast without breaking things.
You have built verification environments from scratch using VCS, Verdi, VMS Execution Manager, and UVM, and you know where each tool shines and where it does not.
What You'll Be Doing
• Architect and implement unified verification flows for Synopsys digital IP products using VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs
• Build scalable verification infrastructure from the ground up, designing environments that support complex IP and SoC projects across global teams
• Define, document, and propagate verification methodologies and best practices that become the standard across Synopsys digital IP projects
• Lead and mentor verification engineers, providing technical guidance on UVM, SystemVerilog, flow optimization, and debugging strategies
• Drive technical initiatives independently, managing high-impact assignments from concept through deployment and adoption
• Collaborate with EDA tool development teams to influence product roadmaps, provide feedback, and optimize verification workflows for real-world use cases
• Troubleshoot and refine verification processes for internal teams and customers, diagnosing flow bottlenecks and delivering solutions that stick
The Impact You Will Have
• Establish verification methodology standards that accelerate time-to-market for Synopsys digital IP and SoC products
• Enable global verification teams to deliver higher quality results faster by providing robust, reusable flows and infrastructure
• Shape the verification strategy for next-generation Synopsys IP offerings, directly influencing product quality and customer satisfaction
• Reduce verification cycle time and resource overhead across multiple projects by standardizing tooling and best practices
• Develop the next generation of verification engineers at Synopsys, building a culture of technical excellence and continuous learning
• Influence the evolution of Synopsys EDA tools by providing critical, field-tested feedback to product teams
• Strengthen Synopsys' leadership position in semiconductor verification by driving adoption of cutting-edge methodologies across the organization
What You'll Need
• 10+ years of hands-on experience in IP or SoC verification, with a proven track record of leading technical initiatives and delivering complex verification environments
• Deep expertise with Synopsys verification tools including VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and Verification IP (VIP)
• Strong programming and scripting skills in SystemVerilog, UVM, Tcl, and Python for automation and flow development
• Demonstrated ability to architect verification flows and infrastructure for complex digital designs, from initial concept to production deployment
• Bachelor's degree in Electronics, Electrical, or Computer Engineering; advanced degrees are a plus
• Experience managing multiple technical projects independently, balancing priorities and delivering high-quality results on schedule
• Ability to document and communicate technical methodologies clearly across global, cross-functional teams
