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Asic design Sr .Engineer
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#520364
Full Time
Job Description
Overview
The ASIC Design Senior Engineer plays a critical role in the development and implementation of advanced integrated circuit designs within our organization. This position is vital in driving innovation and ensuring that our products maintain a competitive edge in the rapidly evolving semiconductor industry. The Senior Engineer is expected to contribute technical expertise and leadership in the ASIC design process, from initial concept through to production. Working collaboratively with cross-functional teams, the engineer will solve complex design challenges, optimize performance, and ensure adherence to industry standards. This role will not only require deep technical knowledge but also the ability to mentor junior engineers and lead project initiatives. The ideal candidate will have a strong background in digital and analog design, and a proven track record of delivering projects on time and within budget. The Senior Engineer will be instrumental in shaping the future of our technology solutions and will have significant impact on the company's success.
Key Responsibilities
• Design and validate complex ASICs in accordance with specifications.
• Develop RTL using Verilog/System Verilog for various digital components.
• Conduct simulation and verification of designs using advanced methodologies.
• Execute timing analysis and optimization to meet performance requirements.
• Collaborate with cross-functional teams including hardware, software, and test engineering.
• Perform power estimation and drive strategies for low-power design.
• Oversee the transition from design to tape-out and ensure compliance with DFT standards.
• Mentorship and training of junior engineers and interns in design practices.
• Participate in design reviews and provide constructive feedback.
• Address and resolve design-related issues throughout the lifecycle.
• Communicate effectively with project managers to ensure timelines are met.
• Document design processes and maintain accurate design records.
• Utilize FPGA devices for prototyping and testing of ASIC functionalities.
• Research and implement new design tools and methodologies.
• Keep updated with industry trends and advancements in ASIC technology.
Required Qualifications
• Bachelor's or Master's degree in Electrical Engineering or related field.
• Minimum of 5 years of experience in ASIC design and development.
• Strong experience with digital circuit design and verification methodologies.
• Proficient in Verilog and System Verilog programming.
• Hands-on experience with tools such as Cadence, Synopsys, and Mentor Graphics.
• Familiarity with FPGA development and prototyping techniques.
• Demonstrated experience in timing closure and power optimization.
• Solid understanding of DFT concepts and techniques.
• Ability to mentor junior engineers and lead design projects.
• Excellent problem-solving and analytical skills.
• Strong communication skills, both verbal and written.
• Ability to work collaboratively in a fast-paced environment.
• Knowledge of industry standards and best practices in ASIC design.
• Experience with scripting languages such as Perl or Python is a plus.
• Strong organizational skills and attention to detail.
• Demonstrated track record of successful project delivery.
Skills: system verilog,problem solving,simulation and verification,power optimization,dft,timing analysis,schematic capture,fpga development,low-power design,dft standards,soc,scripting languages (perl, python),verilog,digital circuit design,rtl coding,asic design,power estimation
The ASIC Design Senior Engineer plays a critical role in the development and implementation of advanced integrated circuit designs within our organization. This position is vital in driving innovation and ensuring that our products maintain a competitive edge in the rapidly evolving semiconductor industry. The Senior Engineer is expected to contribute technical expertise and leadership in the ASIC design process, from initial concept through to production. Working collaboratively with cross-functional teams, the engineer will solve complex design challenges, optimize performance, and ensure adherence to industry standards. This role will not only require deep technical knowledge but also the ability to mentor junior engineers and lead project initiatives. The ideal candidate will have a strong background in digital and analog design, and a proven track record of delivering projects on time and within budget. The Senior Engineer will be instrumental in shaping the future of our technology solutions and will have significant impact on the company's success.
Key Responsibilities
• Design and validate complex ASICs in accordance with specifications.
• Develop RTL using Verilog/System Verilog for various digital components.
• Conduct simulation and verification of designs using advanced methodologies.
• Execute timing analysis and optimization to meet performance requirements.
• Collaborate with cross-functional teams including hardware, software, and test engineering.
• Perform power estimation and drive strategies for low-power design.
• Oversee the transition from design to tape-out and ensure compliance with DFT standards.
• Mentorship and training of junior engineers and interns in design practices.
• Participate in design reviews and provide constructive feedback.
• Address and resolve design-related issues throughout the lifecycle.
• Communicate effectively with project managers to ensure timelines are met.
• Document design processes and maintain accurate design records.
• Utilize FPGA devices for prototyping and testing of ASIC functionalities.
• Research and implement new design tools and methodologies.
• Keep updated with industry trends and advancements in ASIC technology.
Required Qualifications
• Bachelor's or Master's degree in Electrical Engineering or related field.
• Minimum of 5 years of experience in ASIC design and development.
• Strong experience with digital circuit design and verification methodologies.
• Proficient in Verilog and System Verilog programming.
• Hands-on experience with tools such as Cadence, Synopsys, and Mentor Graphics.
• Familiarity with FPGA development and prototyping techniques.
• Demonstrated experience in timing closure and power optimization.
• Solid understanding of DFT concepts and techniques.
• Ability to mentor junior engineers and lead design projects.
• Excellent problem-solving and analytical skills.
• Strong communication skills, both verbal and written.
• Ability to work collaboratively in a fast-paced environment.
• Knowledge of industry standards and best practices in ASIC design.
• Experience with scripting languages such as Perl or Python is a plus.
• Strong organizational skills and attention to detail.
• Demonstrated track record of successful project delivery.
Skills: system verilog,problem solving,simulation and verification,power optimization,dft,timing analysis,schematic capture,fpga development,low-power design,dft standards,soc,scripting languages (perl, python),verilog,digital circuit design,rtl coding,asic design,power estimation
